Guru
Joined: 21/06/2018
Location: AustraliaPosts: 1309
| Posted: 01:09pm 18 Jun 2019 |
Quick update to my inverter build, boards are all coming together with no unsolvable issues yet. Gate drive circuit with negative bias also seems to work very well. I have a few jobs on the go so, my inverter time is limited at the moment.
A few pictures to show effects of gate resistor. . I found the suggestion of how to choose the correct value from an application note I found.
Please ignore the CH2 volts - I had bumped the probe to x1 so 4th image CH2 is actually 2V/Div not 20. Also note the negative 5V idle bias to ~ +12V drive swing.
Too low (1 Ohm) overshoot
Too high (3.3 Ohm) undershoot
What appears to be optimum (2.2 Ohm)
The last picture chows the 2 x drive waveforms, 1 straight at the buffered output and 2 the actual gate waveform after the gate resistor, all gates being driven (4) It looks pretty promising so far.
PCB with FETs mounted.
Next job is to fit the ferrite beads and select the dead-time capacitor and more testing.
If at first you dont succeed, I suggest you avoid sky diving....
Cheers Mike