Introducing the Colour Maximite 2

Author	Message
robert.rozee Guru Joined: 31/12/2012 Location: New Zealand Posts: 2502	Posted: 12:46pm 08 May 2020         matherp said   You are still missing B11 and H4 which are the Nunchuck pins Vref and VBAT should not be GND. VREF is 3.3 and VBAT is the battery RESET, PDR_ON and BOOT0 are all system pins and should probably have a colour E4, E5, E6, F10, H2, H3, H8, G12, D6 and G7 are all reserved to the Display controller A8 is the test pin and outputs a clock pulse to check the processor is running hi peter,   i've updated my spreadsheet with the above info     CMM2, CPU module pin usage (v2).zip this chart is intended ONLY as a visual aid to give a rough idea of how pins are allocated (and how few are left spare). THE LABELS ARE NOT GUARANTEED TO BE CORRECT. all pins tied to any power rail are in black without distinction. it looks like geoff's schematic misses the nunchuck connector, hence why it was left out before. geoff: may be worth updating the schematic in the constructors pack. if anyone wants to make a true function chart, they should probably work off the module schematic rather than this chart. as i say, this chart may well contain ERRORS; it was only a quick visual aid i put together from the printed schematics. as it stands, it looks like there are only a couple dozen unallocated pins, far less than folks were initially thinking: approx 40 of the 160 pins are consumed by the SRAM and can not be used, approx 30 are used by the VGA support, approx 30 are allocated to the I/O connector, close to 20 are power related. cheers, rob   :-)