KeepIS
Guru
Joined: 13/10/2014 Location: AustraliaPosts: 1685 |
Posted: 04:02am 10 Mar 2024 |
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If you have a revised circuit I will use that as a basis, otherwise I will change the 2R2 values to 1R2 and add the upper beads to the circuit.
I understand the propagation delay in FET On/Off time. The delay shown in the capture is around 180nS, that's between the Upper and Lower FETs driven by OC1 and OC2, 1LO and 1HO, measured after the associated buffer / totem pole.
Should I open that out to 230nSec ? I can do that when I swap the 2R2 resistors out.
I can easily calculate the R value and measure the result. I should be able to quickly check the FET Gate / Source point directly with no load and no heatsink after the mod. |