Guru
Joined: 02/02/2017
Location: AustraliaPosts: 1470
| Posted: 01:34am 15 Feb 2026 |
here is a detailed look at high side switch on, this time
with 2 470pF parallel across gate and source. this is nearly 1nF.
Pink is half bridge output voltage (connected to primary winding)
125MSamp/sec means 25 sample points each 200ns so the voltages
are what the DSO saw (and not implied with interpolation)
The output is ringing like a bell and what is driving it?
we know output voltage couples into the low side gate voltage
probably there is some inter channel cross talk too.
I like how it rings hard, reduces some, then rings again, then settles down.
it seems to be 4 cycles per 200ns or 20Mhz
If I could target this with something tuned for 20 Mhz things
might start looking good.
the above tests were at 200W output load.
this is with no load at nearly the same place in the 50Hz cycle.
I can't believe how good it looks
to see what sort of difference in signal probing I connected
the isolated probe to the bridge output and it follows the Pink curve perfectly
is a little delayed. similar rise times and delayed by 8ns.
so that voltage on the output rises well before the high side FET switches on.
Edited 2026-02-15 11:50 by poida