Senior Member
Joined: 11/11/2021
Location: United StatesPosts: 200
| Posted: 07:16pm 15 Feb 2026 |
For clarification, were the gate resistor and cap changes made *with* the turn-off bypass diode?
If not, the results showing increased false turn-on peaks are not surprising. From earlier tests, it's clear that the turn-off bypass diode is necessary but *not* sufficient to reduce the false turn-on peak level to below the gate turn-on threshold voltage. This suggests the gate driver internal turn-off resistance is already relatively high. Any external turn-off resistance will only increase the false turn-on voltage. I would suggest adding the 470pF gate cap to the 10R/diode config from earlier tests.
As for failure mechanism, my high level understanding is that shoot-through generates tremendous heat rapidly that degrades the gate oxide layer. Specifically, shoot-through during false turn-on's happens in the linear region of both high and low side FET's which is really bad. This is very different from high load conditions in systems without shoot-through's where the FET's are mostly experiencing high current in the non-linear region.
Edited 2026-02-16 05:18 by analog8484