Guru
Joined: 31/12/2016
Location: AustraliaPosts: 1203
| Posted: 12:37am 25 Mar 2017 |
Just a quick question?
when reducing the value of the gate resistor di/dt is generated when high currents are switched too fast. This is due to stray inductance present in the circuit, which produces a high voltage spike (Ringing) and sometimes death to the fets.
since most of us build our own H-BRIDGE the inductance will vary a bit.
So i think the gate resistor should be sized to suit each different build or at least adjusted sacrificing some efficiency for reliability.
Deciding the value of the pull-down resistor? Usually the purpose of a pull-down is to keep the FET off during startup,
the value of gate to source resistor most inverters i have seen(i haven't seen that many) were 2k-7k resistance.
Now if I'm barking up the wrong tree let me know.
Cheers
Aaron