Various aspects of home brew inverters


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poida

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Joined: 02/02/2017
Location: Australia
Posts: 1440
Posted: 09:05am 02 Mar 2019      

  mackoffgrid said  
I believe it is important to get this right at no load, because High loads are likely to be inductive and will slow dvdt, its at no load that dvdt will show it affects and possibly will cause destruction of the mosfets.


I agree that no or low load conditions are frequently present when an inverter fails.
My blowups all were at 500W sort of loads, where the board can do 2.5kW and everything else is good for those sorts of power.

My view at the moment, and I am prepared to change it when I see things that demand
a change, is that the MOSFET bridges we build can easily take the sorts of power
we put through them. Even when there is likely some shoot through.

My view is that failures of mine are due to the dv/dt induced gate voltages
can some times be fed back into the gate drive IC output stages where they must never
reach less than -0.3V to ground (low side) or -0.3 to VS (high side)
When this happens the totem pole FET output stage in the IC can blow, likely shorting to high. If it fails, shorting to low, the MOSFET bridge will have one leg
never switched ON and so no problems.
wronger than a phone book full of wrong phone numbers