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Forum Index : Microcontroller and PC projects : Picomite VGA Logic analyzer

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Volhout
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Joined: 05/03/2018
Location: Netherlands
Posts: 5193
Posted: 08:42am 24 May 2023
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All,

This is version LA_23 with
- in 6 channel mode, lower part of the screen is help text
- user manual small changes

Put banner.bmp and LA_23.bas in one directory, and run LA_23

Suc6

Volhout
LA_23.zip
PicomiteVGA PETSCII ROBOTS
 
Volhout
Guru

Joined: 05/03/2018
Location: Netherlands
Posts: 5193
Posted: 11:55am 30 Jun 2023
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All,

For those people running PicomIteVGA version 5.0708b7 and later, you can benefit from the improved DMA functionality. This does not add features to the LA, but allows infinite wait times for a trigger.

The earlier releases would time out after minutes...hours depending the sample speed. Peter has fixed this in MMBasic. This version makes use of that fix.

Volhout
LA_24_DMA_autodetect.zip
Edited 2023-07-01 03:43 by Volhout
PicomiteVGA PETSCII ROBOTS
 
Volhout
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Joined: 05/03/2018
Location: Netherlands
Posts: 5193
Posted: 11:48am 10 Jan 2024
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Minor update to LA_24.

- faster screen writes using framebuffer. Tested on V50800beta5.
Screen update from 281ms (252MHz) down to 119ms.
- fixed a bug in channel name editor

LA_24_1.zip

Volhout

@Peter: the vertical lines in the trace are disabled for in this version. Uncomment line 649 to get them back.
Edited 2024-01-11 01:09 by Volhout
PicomiteVGA PETSCII ROBOTS
 
PhenixRising
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Joined: 07/11/2023
Location: United Kingdom
Posts: 1476
Posted: 06:43pm 28 Aug 2025
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Now that we have the 2350B, can this be extended to sixteen channels?

Only asking out of curiosity  
 
Volhout
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Joined: 05/03/2018
Location: Netherlands
Posts: 5193
Posted: 06:50am 29 Aug 2025
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Hi Phenix,

The logic analyzer internally is 32 bit. So the answer is Yes.
But...
There is always a but..
In this case there are 2 buts..



1/ Trigger
The logic analyzer uses PIO's, and PIO's cannot perform logic math. To set up a trigger condition, the PIO has to analyze the GPIO pin condition bit for bit. (No logic AND or OR or EXOR). And each condition check is a small PIO routine, that get's dynamically added to the PIO program. And the PIO program space is finite. So 6 trigger conditions will fit, but not more. Hence, 6 or 8 channels in the current code.
If you would alloow only 6 trigger conditions for 16 channels, the user interface (that is channel alligned) mus be rewritten.

2/ Display
The current display consumes 120ms(2040) or 90ms(2350) of plotting data in the view window. This is added to the sampling period, and the post processing of the data. To extend that to 16 or more channels makes the logic analyzer really slow (apart from the fact that the screen resolution (640x480) will not allow a very good vertical resolution. Of coarse the display engine needs to be adapted to the 16 channels. And maybe dynamic, since there is also text in between the traces (I2C decoding/Timing measurement).

Please find attached the latest Logic Analyzer running on 6.00.03.

LA_25.zip

Volhout
Edited 2025-08-29 16:56 by Volhout
PicomiteVGA PETSCII ROBOTS
 
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