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Forum Index : Microcontroller and PC projects : CMM2 core for MISTer FPGA - what do you think
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jirsoft Guru  Joined: 18/09/2020 Location: Czech RepublicPosts: 532 |
Hi, just an idea, but after I saw interest in FPGA here, maybe can be nice to create Colour Maximite 2 core for MISTer FPGA. I don't expect too much interest from MISTer community - the main reason for new core creation is mostly unavailability of the original HW (retro computers, consoles etc.) and it makes not too much sense to provide core for computer, that is modern and can be today bought or assembled. But, I still think, it could be good project, because: 1. it can bring information about MMBasic into wider audience 2. DE-10 nano, on what is MISTer built should be (at least I think so) with ARM cores (it has 2 of them) binary compatible to CMM2. So for most other cores needs to be built CPU in FPGA part, but here can be in FPGA done just graphic and sound part, rest can be written for ARM part 3. Because I'm still doing some retro computing (C64/128, Acorn Archimedes, Compact Macintosh etc.), it will be nice to have all in one device  Is here somebody else, who owns MISTer FPGA ( I'm still waiting for mine to be delivered) and finds this idea interesting? Jiri Napoleon Commander and SimplEd for CMM2 (GitHub), CMM2.fun |
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Fingerhoff Newbie  Joined: 21/01/2021 Location: GermanyPosts: 11 |
Yepp, got mine about four weeks ago,...the de10-nano, at least. Yesterday I finally received the 32MB-SDRAM module from aliexpress, which took like forever to arrive! Before that I couldn't really do much with the MISTer-Setup. I ran Mr.Fusion + Update-all but most cores understandably wouldn't even launch without the RAM. That of course changed yesterday, so I gave it another try and I have to say,..it's pretty darn cool. Especially since it's so easy to setup! On the other hand, the de10-nano is damn hard to come by - like so many things these days - at least for a decent price A CMM2 core would definitely be a worthy addition to the MISTer project. Unfortunately, I don't have the first clue how that can done  |
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thwill Guru Joined: 16/09/2019 Location: United KingdomPosts: 3846 |
Isn't the ARM inside the CMM2 considerably more powerful than any of the machines the MISTer FPGA can be programmed as ? Best wishes, Tom Game*Mite, CMM2 Welcome Tape, Creaky old text adventures |
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| jirsoft Guru Joined: 18/09/2020 Location: Czech RepublicPosts: 532 |
You are right, but the idea was not to use FPGA for CMM2 ARM but to run the CMM2 ARM code on MISTErt ARM core and FPGA use just for graphic, sound, I/Os... Specs: Hard Processor System Processor Dual-core ARM Cortex*-A9 MPCore processor at 800 MHz neon framework media-processing engine with double-precision floating point unit (FPU) 32 KB L1 instruction cache 32 KB L1 data cache 512 KB shared L2 cache Memory 64 KB on-chip SRAM 1 GB DDR3 SDRAM (32-bit data) 8 GB microSD* flash memory card Processor I/O 1 gigabit Ethernet PHY with RJ45 connector 1 USB 2.0 On-The-Go (OTG) port, USB Micro-AB connector microSD* card interface and socket Accelerometer (I2C interface plus interrupt) UART to USB, USB Mini-B connector Warm reset button, cold reset button One user button and one user LED FPGA Programmable Logic Logic elements (LE): 110 K LE 5,570 kilobits memory 224 18 x 19 multipliers 112 variable precision DSP blocks 6 phased-locked loops (PLL) 145 user-defined I/O Configuration Sources Embedded USB-Blaster* II (JTAG) cable Serial configuration flash - EPCS128 ARM Cortex*-A9 hard processor system (HPS) I/O Interfaces 2 push buttons 4 slide switches 8 LEDs 3 clock sources (50 MHz) from the clock generator 2 expansion headers (40-pin) with diode protection 1 Arduino* expansion header compatible with Arduino UNO* R3 (can connect with Arduino shields) 1 analog input expansion header (10-pin) shared with Arduino analog input 8-channel, 12-bit A/D converter, 500 ksps, 4-pin serial peripheral interface (SPI) Hardware Design 32-bit fast Fourier transform (FFT) engine HDMI* output (video pipeline) GPIO for LEDs, push buttons, and slide switches I/F to Arduino shield headers (digital I/O, serial I/O, A/D converter) Jiri Napoleon Commander and SimplEd for CMM2 (GitHub), CMM2.fun |
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Mixtel90 Guru Joined: 05/10/2019 Location: United KingdomPosts: 5731 |
I find the idea scary. lol Even writing the VHDL for a sound subsystem is scary, never mind a GPU. I might eventually manage I2C. :) Remember that you are writing everything for the FPGA using clocked logic described in a text file. It's lower level than machine code programming. There isn't even anything equivalent to an assembler at that level, just a "test bench" to look at the timing of your logic. Mick Zilog Inside! nascom.info for Nascom & Gemini Preliminary MMBasic docs & my PCB designs |
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| Volhout Guru Joined: 05/03/2018 Location: NetherlandsPosts: 3536 |
The idea brings out the extremes in me. A it is nice to have a configurable platform that runs MMbasic. Top B MMbasic was a masterpiece of engineering, because it could run on a simple microcontroller, usin the standard peripherals to do something they where not designed for, like generate video. The MM1 was, and successors are, a masterpiece of engineering. Fpga....Nope. Volhout PicomiteVGA PETSCII ROBOTS |
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| jirsoft Guru Joined: 18/09/2020 Location: Czech RepublicPosts: 532 |
I think is not simpler "GPU" than in CMM2, for the sound system it's similar... Yes, you are right, but to have CMM2 with HDMI output can be also interesting. But it's just an idea, I'm still waiting for my MISTer FPGA... Jiri Napoleon Commander and SimplEd for CMM2 (GitHub), CMM2.fun |
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epsilon Senior Member  Joined: 30/07/2020 Location: BelgiumPosts: 255 |
I certainly like the idea of joining a project that sets out to create an FPGA based retro-ish computer. These ambitious projects tend to get so complex however, that they collapse on themselves. To mitigate that, I thought it would be best to start from a minimal, but working, system. Rather than start from scratch, leverage existing open-source cores: a CPU, wishbone bus, on-chip memory, and a UART. Then, gradually add existing open-source cores: SD storage, PS/2 keyboard, an on-chip framebuffer, DDFS sound. Only then start adding your own logic: the beginnings of a graphics core maybe, or an accelerator. Same thing on the software side: start from the selected CPU's toolchain and just include the resulting image into the FPGA bitstream. Take it from there: add IO, then add a shell library, then add a filesystem library, etc. So the idea is to start from a simple, limited, but working system, and grow it - but always keep it working. My plan was to start from an Arty A7 (or a Nexys A7 maybe), because that's what I happen to have :-) Epsilon CMM2 projects |
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| Mixtel90 Guru Joined: 05/10/2019 Location: United KingdomPosts: 5731 |
Have you seen Grant Searle's page on his MultiComp? A choice of Z80, 6502 or 6809 cores. You "build" your computer by cutting & pasting VHDL. You can always add your own stuff or modify what's there. VHDL is VHDL. If you change the I/O and there are sufficient facilities then it should transfer between FPGAs. You may need to tweak timing depending on the clocks, of course. Mick Zilog Inside! nascom.info for Nascom & Gemini Preliminary MMBasic docs & my PCB designs |
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| mclout999 Guru Joined: 05/07/2020 Location: United StatesPosts: 430 |
I think that it is theoretically possible with a hybrid approach as jirsoft has suggested but no one I know of in the Mister forums has developed any hybrid core as of yet(there are discussions but very little concrete code so far). I believe The Cyclon 5 would not have the ability to run a full modern ARM core component in VHDL. The Acorn computers COREs have the earliest very simple ARM cores components but they are significantly less complex than the ARM chip in the CMM2. I think this should be brought to the Mister FPGA forums and ask them about the feasibility of the project. They have a great number of very talented FPGA coders and they would know best. I am going over there to ask around. EDIT: I have posted a new topic about this idea. Maybe go check it out. https://misterfpga.org/viewtopic.php?f=14&t=3552 Edited 2021-10-27 23:49 by mclout999 |
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| epsilon Senior Member Joined: 30/07/2020 Location: BelgiumPosts: 255 |
 Very cool! This is actually very close to what I had in mind. Thanks for sharing that link! Now I have to learn VHDL. So far I've stuck to just SystemVerilog. I guess in the end I'll have to be familiar with both if I'm going to be using other people's cores. Epsilon CMM2 projects |
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| Volhout Guru Joined: 05/03/2018 Location: NetherlandsPosts: 3536 |
@ mcloud99, I am not sure the misterfpga guys can really help you. It is most likely that ARM protects it's IP, and will not openly distribute a VHDL library of the core used in the STM32H743. That is why they provide ARM cores in FPGA's, to keep the IP in house. But the STM32H743 is more than the ARM core alone. It contains a set of peripherals (DMA's,ADC's,Timers,I2C blocks, memory interface, caches, flash, RTC, etc..) that will most likely not be available from ST in VHDL form (yes, they design the peripherals, ARM does only provide the core). The mister guys combine information from designs that where made 40+ years ago, and over these 40+ years the community has reverse engineered Z80 and 6502 cores, and peripherals like the 6845 video chip, where they replace the HW API with a HDMI hardware block. It is possible that the ARM cores will become available in 30 years time, but probably not now. And the peripherals....probably never. I see a lot of enthousiasm in this thread, but do not make the leap to big. I am in several retro computing forums, and it is a big enough challenge to combine some 1980's chips (maybe 4000 transistors each) inside an FPGA and make it run the old ROM's. An STM32H743 may be a leap to far.... Volhout PicomiteVGA PETSCII ROBOTS |
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| epsilon Senior Member Joined: 30/07/2020 Location: BelgiumPosts: 255 |
The Cyclone V on the Mister FPGA includes a dual A9 hard core, so there's no need to synthesize an ARM core. Synthesizing the usual low-speed peripherals (SPI, I2C, UART, timers...) in FPGA is not very hard. Synthesizing the equivalent of the LTDC might be tricky though. If the goal is to create a cycle-accurate emulation of the CMM2, that's a completely different (impossible) story of course, but I don't see the point of doing that. A port of MMBasic to the Mister FPGA, with CMM2 comparable capabilities (or better, because A9) should be doable I think. Epsilon CMM2 projects |
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| Volhout Guru Joined: 05/03/2018 Location: NetherlandsPosts: 3536 |
Hi Epsilon, Not sure a dual core A9 will run the same binary as a Cortex-M7 (as in the STM32H743). You should decide whether you make 1/ a new compile for the MMBasic code for this platform (a "port" as it is called) or if 2/ you want to make the fpga api compliant with the H743, so you can run the same CMM2 binary. I think the second option is a major undertaking, and will probably outlive our lives. You will never get that right (honestly). Option 1 I see at the only valid option. Meaning you port MMBasic to a new platform. Arm A9 based, with peripherals that you have VHDL code for. Not necessarily the same peripherals as in the H743, but similar. This could be a community project, some working on the VHDL for the FPGA, and some on the MMbasic side. Volhout PicomiteVGA PETSCII ROBOTS |
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| epsilon Senior Member Joined: 30/07/2020 Location: BelgiumPosts: 255 |
Hi @Volhout, Option 1, exactly. I think this is also what Jiri is proposing, but he can speak for himself. What I like about the idea is that you end up with a tinkerer's computer that's never 'done', because most of the hardware is actually soft. If you want a Hardware FFT accelerator, HW Sprite collision detection for a game engine (I want that), additional peripherals, a fancy synthesizer core... all those things can be added afterward. The hardware side is never 'done'. Epsilon CMM2 projects |
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| Mixtel90 Guru Joined: 05/10/2019 Location: United KingdomPosts: 5731 |
A big problem is the bottleneck between the processor and the graphics system (which, given those specs, is a GPU). Shifting your data between that hardware system and your processor, even using a parallel bus and interrupts, will never be as fast as DMA. RAM on the FPGA can be dual port, but external RAM probably can't. That means that all video data has to pass via some sort of port from the processor - DMA is unlikely to be possible. There will probably be insufficient RAM on the FPGA to form the frame buffer. Mick Zilog Inside! nascom.info for Nascom & Gemini Preliminary MMBasic docs & my PCB designs |
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| epsilon Senior Member Joined: 30/07/2020 Location: BelgiumPosts: 255 |
The Dual A9 ARM core and the FPGA are on the same chip, coupled through an AXI interconnect. This is very similar to the internal architecture of the STM32H743 chip. So I don't expect there's going to be any issues with CPU access latency and bandwidth to on-chip memory. The amount of on-chip RAM in the FPGA portion of the Cyclone V is 696KB. That's for the whole FPGA however (not including processor subsystem and caches). The CMM2 has 512KB graphics memory on-chip. If we allocate the same amount on the Cyclone V, 184KB is left for other FPGA logic. I have no idea if that's enough. Also important to consider: The CMM2 LTDC can work with both on-chip framebuffers as well as with framebuffers in external memory. That's a must to support higher resolutions and color depths. Designing the equivalent of this LTDC in FPGA may be tricky. Btw, I noticed that the Cyclone V has the usual set of peripherals available as hard IP blocks. Those wouldn't have to be synthesized in FPGA. Epsilon CMM2 projects |
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| Mixtel90 Guru Joined: 05/10/2019 Location: United KingdomPosts: 5731 |
Ah, I don't have any experience of the Cyclone 5. It's far too new for me and I can't afford the dev boards for it. :) Mick Zilog Inside! nascom.info for Nascom & Gemini Preliminary MMBasic docs & my PCB designs |
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| jirsoft Guru Joined: 18/09/2020 Location: Czech RepublicPosts: 532 |
For me that's now just some mental exercise, but Epsilon understood me correctly - it could be done as hybrid core, where ARM will be not in FPGA but MMBasic runs directly on AMR. FPGA will then do the rest, graphic, sound, I/O... And on the start can be just 1 graphic mode and be modified later. I'm not sure, if it will fit the concept of cores for MISTer, because they are running Linux on ARM cores and all the emulation is done in FPGA. ARM work more as "supervisor" of the running core... Jiri Napoleon Commander and SimplEd for CMM2 (GitHub), CMM2.fun |
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| epsilon Senior Member Joined: 30/07/2020 Location: BelgiumPosts: 255 |
Linux only uses one of the two ARM cores. The other one is fully available for emulation, or in this case, for running MMBasic. This is the so-called hybrid mode that mclout999 mentioned. Epsilon CMM2 projects |
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