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Forum Index : Microcontroller and PC projects : CMM2: Is there a memory map ?
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thwill![]() Guru ![]() Joined: 16/09/2019 Location: United KingdomPosts: 4311 |
... there doesn't seem to be one in the manual. Given that poke-ing in the wrong place is liable to cause the CMM2 to hang I'd like to put some protection in SPForth so that it can't perform store operations to such addresses. Best wishes, Tom MMBasic for Linux, Game*Mite, CMM2 Welcome Tape, Creaky old text adventures |
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JohnS Guru ![]() Joined: 18/11/2011 Location: United KingdomPosts: 4044 |
Look at a .map file / linker script / read the ST doc? (I'd expect anything in a manual to be along the lines of "reserved for use by MMBasic" or "may change in future releases".) John |
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thwill![]() Guru ![]() Joined: 16/09/2019 Location: United KingdomPosts: 4311 |
Thanks for the well deserved RTFM John ![]() I'll be honest I'm lazy and if there is a possiblity that someone will point me to the correct FM and the appropriate page then I will almost always ask first. Also I'm a desktop application developer and I struggle to read the data sheet for a 4000 series CMOS chip so the ST documentation is probably not a great place for me to start. Probably best if I just poke around in the CMM2 firmware as I believe I have seen it display some sort of POKE protection. Best wishes, Tom MMBasic for Linux, Game*Mite, CMM2 Welcome Tape, Creaky old text adventures |
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epsilon![]() Senior Member ![]() Joined: 30/07/2020 Location: BelgiumPosts: 255 |
In memedit (which is really just a peek/poke frontend) I defined the following ranges: '--> Mapped address ranges: Can be referenced in goto command. CONST SRAM% = &H38000000 CONST SRAM_END% = &H38010000 - 256 CONST RAM1% = &H30000000 CONST RAM1_END% = &H30040000 - 256 CONST RAM2% = &H40000000 CONST RAM2_END% = &H59000000 CONST AXI_RAM% = &H24000000 CONST AXI_RAM_END% = &H24080000 CONST ROM1% = &H08000000 CONST ROM1_END% = &H08200000 CONST ROM2% = &H10000000 CONST ROM2_END% = &H20000000 '<-- Epsilon CMM2 projects |
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thwill![]() Guru ![]() Joined: 16/09/2019 Location: United KingdomPosts: 4311 |
Thanks @epsilon, that looks like the information I need. where did you get these from ? and would you briefly expand on what each range is for ? Best wishes, Tom MMBasic for Linux, Game*Mite, CMM2 Welcome Tape, Creaky old text adventures |
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epsilon![]() Senior Member ![]() Joined: 30/07/2020 Location: BelgiumPosts: 255 |
The bulk of it came from our resident oracle Peter Maher of course: https://www.thebackshed.com/forum/ViewTopic.php?FID=16&TID=12887#156351 The stm32h743ii datasheet has a great block diagram. Docs can be found here: https://www.st.com/en/microcontrollers-microprocessors/stm32h743ii.html# Also very helpful is a copy of the CMM2 FW source code. The comments in there combined with the datasheet block diagram give good info about the different memory regions. Now I'm a bit confused about whether I'm allowed to post here info that I learned directly from the FW source code, so I guess I shouldn't until someone can clear that up for me. The FW source code has comments describing the meaning of the different memory regions. Epsilon CMM2 projects |
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thwill![]() Guru ![]() Joined: 16/09/2019 Location: United KingdomPosts: 4311 |
Thanks for the links @epsilon and "no worries" regarding the FW as I have access to the source code. Now I have some hints on where to look I will do so for myself. Best wishes, Tom MMBasic for Linux, Game*Mite, CMM2 Welcome Tape, Creaky old text adventures |
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Geoffg![]() Guru ![]() Joined: 06/06/2011 Location: AustraliaPosts: 3292 |
Please feel free to post. We (or more properly I) don't want the whole source code openly published because in the past that encouraged forks and alternate versions which caused confusion and trouble for the user base. But excerpts (or any other info) is fine. Geoff Geoff Graham - http://geoffg.net |
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epsilon![]() Senior Member ![]() Joined: 30/07/2020 Location: BelgiumPosts: 255 |
Thank you for clearing that up, Geoff. So, in that case, this is the info I was referring to: * #define D1_AXISRAM_BASE (0x24000000UL) /*!< Base address of : (up to 512KB) system data RAM accessible over over AXI */ AXI-SRAM is embedded SRAM * #define PERIPH_BASE (0x40000000UL) /*!< Base address of : AHB/APB Peripherals This is memory-mapped peripheral space * #define D2_AHBSRAM_BASE (0x30000000UL) /*!< Base address of : (up to 288KB) system data RAM accessible over over AXI->AHB Bridge */ #define D3_SRAM_BASE (0x38000000UL) /*!< Base address of : Backup SRAM(64 KB) over AXI->AHB Bridge More SRAMs in other 'domains' of the chip. Domains are power management domains, i.e. areas that can be powered-up / down / put in standby separate from the other domains in the chip. * #define D1_AXIFLASH_BASE (0x08000000UL) /*!< Base address of : (up to 2 MB) embedded FLASH memory accessible over AXI #define D2_AXISRAM_BASE (0x10000000UL) /*!< Base address of : (up to 288KB) system data RAM accessible over over AXI AXI, AHB and APB are the different buses used internally by ARM. AXI is the main bus, AHB is a bit more limited/older, and APB is for peripherals. Now that I'm looking at it, I noticed that two important ranges are missing: * 0xd0000000-0xd2000000: SDRAM: External memory, accessed through the FMC memory contoller * 0x38800000-0x38801000: Backup-SRAM. Backup SRAM retains data in low power mode Note that there are more RAMs, e.g. ITCM and DTCM, Tightly Coupled Memories with very low-latency access, but those are not made accessible to MMBasic. The FW reserves this memory for itself, for performance-critical work. Epsilon CMM2 projects |
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thwill![]() Guru ![]() Joined: 16/09/2019 Location: United KingdomPosts: 4311 |
Thanks @epsilon, I still don't know what most of that means ![]() Best wishes, Tom MMBasic for Linux, Game*Mite, CMM2 Welcome Tape, Creaky old text adventures |
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